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A programmable crystal adaptive configuration scheme based on high level synthesis technology is proposed, and the floating point calculation of crystal parameters and IIC bus communication are realized by using high level synthesis technology, and the adaptive configuration of programmable crystal is realized on this basis. It has been tested that, compared to the traditional RTL implementation, the amount of code used to configure the parameters of the programmable crystal using high level synthesis technology is only 1/4 to 1/10 of the former, and there is no significant reduction in code running efficiency. The results show that the high level synthesis technology can not only effectively improve the design and development efficiency of FPGA in the fields of algorithm development and data processing, but also has good application and promotion value in FPGA interface and timing design.