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Based on the quantitative reasoning of FPGA, the CNN acceleration system is designed. Through the analysis of the operation characteristics of the mainstream deep neural network structure, the int8 quantitative reasoning method of intercepting the threshold using the (density based spatial clustering of applications with noise) DBSCAN clustering algorithm is used to integrate the full connection of the deep neural network, reduce the data operation bit width and compress the network size, and effectively compress the network structure with little loss of accuracy. Based on the CNN network structure of lenet-5, vgg-16 and resnet-50, a quantitative CNN acceleration system is designed and verified. The experimental results show that when the quantization accuracy of network parameters and input characteristic data is 8-bits, the loss of network accuracy is less than 1% when the network compression rate is 25%. On Xilinx xc7k325 platform, the running frequency of CNN acceleration system is 450 MHz. Compared with other similar accelerators, its GOPs performance is improved by 2 times.