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As gradually popular FPGA validation language in recent years, SystemVerilog contains rich validation features: DPI, assertion technology, functional coverage, etc. DPI interface technology can help verification engineer to call C or C + + in the verification platform, verification engineers can complex incentive model is designed by writing C function . DPI interface technology also provides a new simulation validation for the complex algorithm of the FPGA design. This paper proposes a FPGA simulation method based on DPI interface, the experiment shows that the simulation validation platform by using this method compared with the traditional pure verilog verification platform, has higher efficiency of the simulation and more flexibility of verification .This verification method provides a new way of verification for the validation test of the algorithm FPGA design.