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The continuous development of multicore-on-chip design and system-on-chip technology has brought new challenges to the boundary-scan technology, and the automatical test vector generation of multiple scan topoolgy test has become a research focus and hot spots. To explore the method of test generation based on IEEE1149.7, including interconnect test vector generation, debugging application instructions and data gerneration and register command generation, a general framework for test generation is presented. A automated test generation system is built using VS2008 as software platform, and the information of target board is extracted from database to configure register and generate interconnect test vector or debug data, which will be inserted into the database.